In recent years, semiconductor integrated circuits (LSIs, chips) have been highly functionalized and highly integrated. For example, the number of RAMs (RAM blocks) mounted on one LSI has been increased.
Such an LSI includes a built-in-self-test (BIST) circuit so that a plurality of RAMs mounted on the LSI are tested by the LSI itself.
When testing a plurality of RAMs mounted on the LSI, the plurality of RAMs are simultaneously tested in order to shorten a test time period, and further tests are performed at a high speed using the system's frequency (operating frequency of the LSI).
As semiconductor integrated circuits having a test mode, various ones have hitherto been proposed. Among them, for example, there are semiconductor integrated circuits that test a plurality of RAMs simultaneously as well at high speeds at respective system's frequencies.
However, for example, simultaneously testing a plurality of RAMs at a high frequency might disturb a power supply waveform to thereby cause power supply noise, which would make it impossible to perform exact tests.
That is, for example, when simultaneously testing a plurality of RAMs in a semiconductor integrated circuit, exact tests have been infeasible due to power supply noise, which has raised a problem in that it is impossible to correctly sort out the RAMs into conforming products and nonconforming products, resulting in a reduced yield.